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As the solution to improve fatigue life and mechanical reliability of packaging structure, the material selection in PCB stack-up and partitioning design on PCB to eliminate the electromagnetic interference by keeping all circuit functions separate are suggested to be optimized from the mechanical stress point of view.

The present paper investigated the effect of RO4350B and RT5880 printed circuit board (PCB) laminates on fatigue life of the QFN (quad flat no-lead) packaging structure for high-frequency applications. During accelerated thermal cycling between −50 °C and 100 °C, the mismatched coefficients of thermal expansion (CTE) between packaging and PCB materials, initial PCB warping deformation and locally concentrated stress states significantly affected the fatigue life of the packaging structure. The intermetallics layer and mechanical strength of solder joints were examined to ensure the satisfactorily soldering quality prior to the thermal cycling process. The failure mechanism was investigated by the metallographic observations using a scanning electron microscope.

Typical fatigue behavior was revealed by grain coarsening due to cyclic stress, while at critical locations of packaging structures, the crack propagations were confirmed to be accompanied with coarsened grains by dye penetration tests. It is confirmed that the cyclic stress induced fatigue deformation is dominant in the deformation history of both PCB laminates. Due to the greater CTE differences in the RT5880 PCB laminate with those of the packaging materials, the thermally induced strains among different layered materials were more mismatched and led to the initiation and propagation of fatigue cracks in solder joints subjected to more severe stress states.

In addition to the electrical insulation and thermal dissipation, electronic packaging structures play a key role in mechanical connections between IC chips and PCB.

Vapor phase soldering (VPS), also known as condense soldering, is capable of improving the mechanical reliability of solder joints in electronic packaging structures. The paper aims to discuss this issue.

In the present study, VPS is utilized to assemble two typical packaging types (i.e. ceramic column grid array (CCGA) and BGA) for electronic devices with lead-containing and lead-free solders. By applying the peak soldering temperatures of 215°C and 235°C with and without vacuum condition, the void formation and intermetallic compound (IMC) thickness are compared for different packaging structures with lead-containing and lead-free solder alloys.

It is found that at the soldering temperature of 215°C, CCGA under a vacuum condition has fewer voids but BGA without vacuum environment has fewer voids despite of the existence of lead in solder alloy. In light of contradictory phenomenon about void formation at 215°C, a similar CCGA device is soldered via VPS at the temperature of 235°C. Compared with the size of voids formed at 215°C, no obvious void is found for CCGA with vacuum at the soldering temperature of 235°C. No matter what soldering temperature and vacuum condition are applied, the IMC thickness of CCGA and BGA can satisfy the requirement of 1.0–3.0 µm. Therefore, it can be concluded that the soldering temperature of 235°C in vacuum is the optimal VPS condition for void elimination. In addition, shear tests at the rate of 10 mm/min are performed to examine the load resistance and potential failure mode. In terms of failure mode observed in shear tests, interfacial shear failure occurs between PCB and bulk solder and also within bulk solder for CCGA soldered at temperatures of 215°C and 235°C. This means that an acceptable thicker IMC thickness between CCGA solder and device provides greater interfacial strength between CCGA and device.

Due to its high I/O capacity and satisfactory reliability in electrical and thermal performance, CCGA electronic devices have been widely adopted in the military and aerospace fields. In the present study, the authors utilized VPS to assemble a typical type of CCGA with the control package of conventional BGA to investigate the relation between essential condition (i.e. soldering temperature and vacuum) to void formation.